1. Field of the Invention
The present invention relates to semiconductor device provided with an electrostatic discharge (ESD) protection circuit for protecting internal elements of the semiconductor device from destruction caused by electrostatic current and the like.
2. Description of the Related Art
Conventionally, various kinds of methods are proposed to protect semiconductor device from destruction caused by the electrostatic current and the like. However, as for protection of a signal terminal for inputting/outputting a high-speed signal or a high-frequency signal, in many cases, a relation between increase of terminal capacitance by a protection circuit or a protection element and protection performance thereof becomes a relation of xe2x80x9ctrade-offxe2x80x9d. For that reason, compatibility of control of increase of capacity and improvement of protection performance is difficult.
For instance, the official gazette of the Japanese Patent No. 2,715,593 discloses a semiconductor integrated circuit in which protection performance is improved while controlling increase of terminal capacitance of a terminal to be protected (a first prior art). FIG. 1A is a circuit diagram illustrating a constitution of a semiconductor integrated circuit according to the first prior art.
In the semiconductor integrated circuit 70 according to the first prior art, a first diode 71 is connected to a high potential side power supply terminal VCC and an I/O terminal IN/OUT therebetween. A second diode 72 is connected to the I/O terminal IN/OUT and a low potential side power supply terminal VEE therebetween. A third diode 73 is connected to the high potential side power supply terminal VCC and the low potential side power supply terminal VEE therebetween. An internal circuitry 77 is connected to the I/O terminal IN/OUT. Electricity from the high potential side power supply terminal VCC and electricity from the low potential side power supply terminal VEE are supplied to the internal circuitry 77. The respective diodes are constituted so that backward bias is applied to the respective diodes at the time the circuit is operated, and the respective diodes possess function of avalanche breakdown voltage more than voltage value that is capable of being applied. Consequently, each diode functions as an additional capacitance at the time that the circuit is operated.
FIG. 1B is a circuit diagram illustrating operations of the semiconductor integrated circuit according to the first prior art.
For instance, as illustrated in FIG. 1B in, there are three kinds of current paths when electrostatic discharge occurs from the high potential side power supply terminal VCC to the I/O terminal IN/OUT. A first path A is one in which discharge occurs through the diode 71. A second path B is one in which discharge occurs through the internal circuitry 77. A third path C is one in which discharge occurs through the diode 72 and the diode 73. Accordingly, the avalanche breakdown voltage of the diode 73 is at the most of the same degree of that of the diodes 71 and 72, and if impedance of the diode 73 is low, surge by ESD is distributed into approximately half-and-half onto the path A and the path C. For that reason, even though sizes of the diode 71 and the diode 72 are halved, resist quantity of electrostatic surge can be ensured. Consequently, capacitive load of I/O terminal is reduced.
xe2x80x9cESD Protection Using a variable voltage supply Clampxe2x80x9d (written by Gregg D. Croft (EOS/ESD Symposium Proceedings pp 135-140, 1994)) discloses an integrated circuit (a second prior art) provided with a clamp device (Supply Clamp) between a positive power supply (V+) terminal and a negative power supply (Vxe2x88x92) terminal.
According to the second prior art, even though the surge by ESD is applied to the I/O terminal, a protection diode of the I/O terminal does not cause an avalanche breakdown. Consequently, the protection diode is miniaturized with ESD event resist quantity ensured.
FIG. 2 is a block diagram illustrating a constitution of an ESD protection circuit of the integrated circuit (IC) 80 according to the second prior art.
Protection diodes D1 and D3 are connected to the I/O terminals 82, 83 of IC 80 and the V1+ terminal therebetween, in which respective anodes of the diodes D1 and D3 are directed to the I/O terminal side. Protection diodes D2 and D4 are connected to the I/O terminals 82, 83 and the V1xe2x88x92 terminal therebetween, in which respective cathodes of the diodes D2 and D4 are directed to the I/O terminal side. A clamp device 85, which is made up of a thyristor, is provided between the V1+ terminal and V1xe2x88x92 terminal.
The protection diodes D1 to D4 are capable of being discharged without causing avalanche breakdown even though the surge by ESD is applied to the I/O terminals 82, 83 in such a way that clamp voltage of the clamp device 85 is maintained to be minimized less than a value that is obtained by subtracting voltage value corresponding to voltage drop of two forward bias diodes from the avalanche breakdown voltage of the protection diodes D1 to D4.
Concretely, for instance, in cases where positive surge pulse by ESD is applied to the I/O terminal 82 against the V1xe2x88x92 terminal, current flows from the protection diode D1 (forward direction) toward the V1+ terminal, the current flows from the V1+ terminal toward the clamp device 85, and the current flows from the clamp device 85 toward the V1xe2x88x92 terminal. Thus, the surge by ESD is discharged. Current does not flow toward the protection diode D2. Since the protection diode D1 is operated in the forward direction, power consumption is small. Consequently, also since heat generation is small, it is possible to sufficiently miniaturize the protection diode D1. As to the other diodes D2 to D4, similarly, it is possible to miniaturize size thereof.
In actual state of use where all is mounted on the printed circuit board, the V1+ terminal and the V2+ terminal are short-circuited, and the V1xe2x88x92 terminal and the V2xe2x88x92 terminal are short-circuited. consequently, an anode of the thyristor and an anode gate thereof are short circuited, further, a cathode of the thyristor and a cathode gate thereof are short-circuited. Namely, under the actual state of use, sufficient high clamp voltage is maintained, latch up operation does not occur within a range of a general operating voltage of IC.
The Official gazette of the Japanese Patent Application Laid-Open No, Hei 6-69429 discloses a semiconductor circuit (a third prior art) provided with a protection device for protecting destruction of a gate oxide film of a MOS transistor (transistor for internal circuit protection) caused by static electricity and the like. FIG. 3A is a circuit diagram illustrating a protection circuit of a semiconductor circuit according to the third prior art, and FIG. 3B is a cross sectional view illustrating a region corresponding to the protection circuit.
An input pad 91 of a semiconductor circuit 90 is connected to an internal circuit 92 via a signal line 95. A first resistor R91 is connected between the signal line 95 and a drain of a p-channel MOs transistor QA. A second resistor R92 is connected between the signal line 95 and a drain of an n-channel MOS transistor QB. A source of the transistor QA and a gate thereof are connected to a power supply voltage VPP terminal. A source of the transistor QB and a gate thereof are connected to a power supply voltage VSS terminal. An element separation oxide film 161 is formed between the transistors QA and QB. Polysilicon made resistors 162 and 163 are formed on the element separation oxide film 161. The first resistor R91 corresponds to the resistor 162. The second resistor R92 corresponds to the resistor 163. One end of the resistor 162 is connected to a p-type diffused region 134. One end of the resistor 163 is connected to an n-type diffused region 145. The resistor 162 and the resistor 163 are connected to the signal line 95 respectively.
In the semiconductor circuit 90, an excessive voltage is applied to the respective drains of the transistors QA and QB through the resistor R91 (162) and the resistor R92 (163). For that reason, the excessive voltage is not applied directly to the gate oxide films 136 and 147. Consequently, resist noise characteristics of the gate oxide films 136 and 147 are improved. Accordingly, rate of flowing of leak current remarkably reduced.
In the first prior art, the protection diodes 71, 72 are provided between the I/O terminal and the power supply terminals. Large type protection diode 73 is provided between the power supply terminals. The protection diode 73 possesses approximately equivalent avalanche breakdown voltage to that of the protection diodes 71, 72. According to this constitution, current generated by the surge by ESD applied to the I/O terminal is separated, thus the protection diodes 71, 72 are miniaturized while maintaining ESD protection performance. However, it is necessary to ensure current flow in connection with its reverse direction current in some degrees toward the protection diodes 71, 72 to control stress for the internal circuit 77. Consequently, miniaturization of the protection diodes 71, 72 has a limitation to prevent destruction of the protection diodes 71, 72, with the result that parasitic capacitance more than 4pF parasitizes the I/O terminal. Moreover, in order to miniaturize the protection diodes 71, 72 while sufficiently minimizing the reverse direction current A flowing through the protection diodes 71, 72, it is necessary to increase the avalanche breakdown voltage of the protection diodes 71, 72 in some degrees than that of the protection diode 73. In such a case, this causes stress increase for the internal circuit 77.
In the second prior art, the clamp device 85 made up of the thyristor is provided between the power supply terminals. Due to such constitution, miniaturization of the protection diodes D1 to D4 is made possible while maintaining ESD protection performance. However, when the thyristor is provided between the power supply terminals, there is the problem that operation can not be returned to normal operation until power supply is broken as the thyristor is turned ON caused by noise or the like.
In the third prior art, the MOS transistor is used for the protection device for protecting the internal circuitry. Further, resistive element is used for the protection device for preventing destruction of the gate oxide film of the protection transistor. However, measure for the protecting transistor is only taken when the excessive input is applied to an input terminal under the condition that the VDD terminal and the VSS terminal are normally connected, there is no consideration against to increase of input terminal capacitance caused by the protection device and static electricity before mounting.
An object of the present invention is to provide semiconductor device having an ESD protection circuit in which it is possible to control increase of additional capacitance of a signal terminal while being provided with predetermined protection performance against to surge by ESD and the like irrespective of before and after mounting, and further, it is possible to return to normal operation without breaking power supply after stresses such as surge by ESD and the like are removed.
According to a first aspect of the present invention, a semiconductor device comprises: a signal terminal; a high potential side power supply terminal; a low potential side power supply terminal; a first wiring connected to the high potential side power supply terminal; a second wiring connected to the low potential side power supply terminal; an internal circuit to which power is supplied from the first and the second wirings; first and second resistance elements whose each one end is connected to a first node, the first node being at a wiring connecting the signal terminal with the internal circuit; a first protection element having a first terminal connected to the first wiring and a second terminal connected to the other end of the first resistance element, voltage-current characteristics of the first protection element when the second terminal is grounded having a negative resistance region and a holding region; a second protection element having a third terminal connected to the other end of the second resistance element and a fourth terminal connected to the second wiring, voltage-current characteristics of the second protection element when the fourth terminal is grounded having a negative resistance region and a holding region; and a third protection element having a fifth terminal connected to the first wiring and a sixth terminal connected to the second wiring, the third protection element being made up of a MOS transistor, voltage-current characteristics of the third protection element when the sixth terminal is grounded having a negative resistance region and a holding region. The relations of xe2x80x9cvh2(I1)+r2xc3x97I1xe2x89xa7Vf1+Vr3 greater than Vr2xe2x80x9d and xe2x80x9cId2 greater than I1xe2x80x9d are satisfied, where I1 represents a value of a first current flowing from the signal terminal to the low potential side power supply terminal via the second resistance element, the second protection element and the second wiring, Id2 represents a value of the first current when it causes destruction of the second protection element, r2 represents a resistance value of the second resistance element, Vf1 represents a voltage when a current starts to flow through the first protection element in case that a positive voltage is applied to the second terminal while grounding the first terminal, Vh2(I1) represents a voltage drop of the second protection element caused by the first current I1, Vr2 represents a negative resistance starting voltage in the negative resistance region of the second protection element, and Vr3 represents a negative resistance starting voltage in the negative resistance region of the third protection element.
According to a second aspect of the present invention, a semiconductor device comprises: a signal terminal; a high potential Side power supply terminal; a low potential side power supply terminal; a first wiring connected to the high potential side power supply terminal; a second wiring connected to the low potential side power supply terminal; an internal circuit to which power is supplied from the first and the second wirings; first and second resistance elements whose each one end is connected to a first node, the first node being at a wiring connecting the signal terminal with the internal circuit; a first protection element having a first terminal connected to the first wiring and a second terminal connected to the other end of the first resistance element, voltage-current characteristics of the first protection element when the second terminal is grounded having a negative resistance region and a holding region; a second protection element having a third terminal connected to the other end of the second resistance element and a fourth terminal connected to the second wiring, voltage-current characteristics of the second protection element when the fourth terminal is grounded having a negative resistance region and a holding region; and a third protection element having a fifth terminal connected to the first wiring and a sixth terminal connected to the second wiring, the third protection element being made up of a MOS transistor, voltage-current characteristics of the third protection element when the sixth terminal is grounded having a negative resistance region and a holding region. The relations of xe2x80x9cVh1(I2)+r1xc3x97I2xe2x89xa7Vf2+Vr3 greater than Vr1xe2x80x9d and xe2x80x9cId1 greater than I2xe2x80x9d are satisfied, where I2 represents a value of a second current flowing from the high potential side power supply terminal to the signal terminal via the first wiring, the first protection element and the first resistance element, Id1 represents a value of the second current when it causes destruction of the first protection element, r1 represents a resistance value of the first resistance element, Vf2 represents a voltage when a current starts to flow through the second protection element in case that a positive voltage is applied to the fourth terminal while grounding the third terminal, Vh1(I2) represents a voltage drop of the first protection element caused by the second current I2, Vr1 represents a negative resistance starting voltage in the negative resistance region of the first protection element, and Vr3 represents negative resistance starting voltage in the negative resistance region of the third protection element.
According to a third aspect of the present invention, a semiconductor device comprises: a signal terminal; a high potential side power supply terminal; a low potential side power supply terminal; a first wiring connected to the high potential side power supply terminal; a second wiring connected to the low potential side power supply terminal; an internal circuit to which power is supplied from the first and the second wirings; first and second resistance elements whose each one end is connected to a first node, the first node being at a wiring connecting the signal terminal with the internal circuit; a first protection element having a first terminal connected to the first wiring and a second terminal connected to the other end of the first resistance element, voltage-current characteristics of the first protection element when the second terminal is grounded having a negative resistance region and a holding region; a second protection element having a third terminal connected to the other end of the second resistance element and a fourth terminal connected to the second wiring, voltage-current characteristics of the second protection element when the fourth terminal is grounded having a negative resistance region and a holding region; a third protection element hating a fifth terminal connected to the first wiring and a sixth terminal connected to the second wiring, the third protection element being made up of a MOS transistor, and voltage-current characteristics of the third protection element when the sixth terminal is grounded having a negative resistance region and a holding region; and a fourth protection element made up of a diode whose anode is connected to a second node and whose cathode is connected to the first wiring, the second node being at the wiring connecting the signal terminal with the internal circuit. The relations of xe2x80x9cVh2(I1)+r2xc3x97I1xe2x89xa7Vf4+Vr3 greater than Vr2xe2x80x9d and xe2x80x9cId2 greater than I1xe2x80x9d are satisfied, where I1 represents a value of a first current flowing from the signal terminal to the low potential side power supply terminal via the second resistance element, the second protection element and the second wiring, Id2 represents a value of the first current when it causes destruction of the second protection element, r2 represents a resistance value of the second resistance element, Vf4 represents a voltage when a current starts to flow through the fourth protection element in case that a positive voltage is applied to the anode of the fourth protection element while grounding the cathode of the fourth protection element, Vh2(I1) represents a voltage drop of the second protection element caused by the first current, Vr2 represents a negative resistance starting voltage in the negative resistance region of the second protection elements and Vr3 represents a negative resistance starting voltage in the negative resistance region of the third protection element. The semiconductor device further comprises a fifth protection element made up of a diode whose cathode is connected to the second node and whose anode is connected to the second wiring.
According to a fourth aspect of the present invention, a semiconductor device comprises: a signal terminal; a high potential side power supply terminal; a low potential side power supply terminal; a first wiring connected to the high potential side power supply terminal; a second wiring connected to the low potential side power supply terminal; an internal circuit to which power is supplied from the first and the second wirings; first and second resistance elements whose each one end is connected to a first node, the first node being at a wiring connecting the signal terminal with the internal circuit; a first protection element having a first terminal connected to the first wiring and a second terminal connected to the other end of the first resistance element, voltage-current characteristis of the first protection element when the second terminal is grounded having a negative resistance region and a holding region; a second protection element having a third terminal connected to the other end of the second resistance element and a fourth terminal connected to the second wiring, voltage-current characteristics of the second protection element when the fourth terminal is grounded having a negative resistance region and a holding region; a third protection element having a fifth terminal connected to the first wiring and a sixth terminal connected to the second wiring, the third protection element being made up of a MOS transistor, and voltage-current characteristics of the third protection element when the sixth terminal is grounded having a negative resistance region and a holding region; a fourth protection element made up of a diode whose anode is connected to a second node and whose cathode is connected to the first wiring, the second node being at the wiring connecting the signal terminal with the internal circuit; and a fifth protection element made up of a diode whose cathode is connected to the second node and whose anode is connected to the second wiring. The relations of xe2x80x9cVh1(I2)+r1xc3x97I2xe2x89xa7Vf5+Vr3 greater than Vr1xe2x80x9d and xe2x80x9cId1 greater than I2xe2x80x9d are satisfied, where I2 represents a value of a second current flowing from the high potential side power supply terminal to the signal terminal via the first wiring, the first protection element and the first resistance element, Id1 represents a value of the second current when it causes destruction of the first protection element, r1 represents a resistance value of the first resistance element, Vf5 represents a voltage when a current starts to flow through the fifth protection element in case that a positive voltage is applied to the anode of the fifth protection element while grounding the cathode of the fifth protection element, Vh1(I2) represents a voltage drop of the first protection element caused by the second current, Vr1 represents a negative resistance starting voltage in the negative resistance region of the first protection element, and Vr3 represents a negative resistance starting voltage in the negative resistance region of the third protection element.
According to a fifth aspect of the present invention, a semiconductor device comprises: a signal terminal; a high potential side power supply terminal; a low potential side power supply terminal; a first wiring connected to the high potential side power supply terminal; a second wiring connected to the low potential side power supply terminal; an internal circuit to which power is supplied from the first and the second wirings; a first protection element having a first terminal connected to the first wiring and a second terminal connected to a first node, voltage-current characteristics of the first protection element when the second terminal is grounded having a negative resistance region and a holding region, and the first node being at a wiring connecting the signal terminal with the internal circuit; a second protection element having a third terminal connected to the first node and a fourth terminal connected to the second wiring, voltage-current characteristics of the second protection element when the fourth terminal is grounded having a negative resistance region and a holding region; a third protection element having a fifth terminal connected to the first wiring and a sixth terminal connected to the second wiring, the third protection element being made up of a MOS transistor, and voltage-current characteristics of the third protection element when the sixth terminal is grounded having a negative resistance region and a holding region; a fourth protection element made up of a diode whose anode is connected to a second node and whose cathode is connected to the first wiring, the second node being at the wiring connecting the signal terminal with the internal circuit closer to the signal terminal than the first node; a fifth protection element made up of a diode whose cathode is connected to the second node and whose anode is connected to the second wiring; and a resistance element connected to the first node and the second node therebetween. The relations of xe2x80x9cVh2(I1)+r3xc3x97I1xe2x89xa7Vf4+Vr3 greater than Vr2xe2x80x9d and xe2x80x9cId2 greater than I1xe2x80x9d are satisfied, where I1 represents a value of a first current flowing from the signal terminal to the low potential side power supply terminal via the resistance element, the second protection element and the second wiring, Id2 represents a value of the first current when it causes destruction of the second protection element, r3 represents a resistance value of the resistance element, Vf4 represents a voltage when a current starts to flow through the fourth protection element when a positive voltage is applied to the anode of the fourth protection element while grounding the cathode of the fourth protection element, Vh2(I1) represents a voltage drop of the second protection element caused by the first current, Vr2 represents a negative resistance starting voltage in the negative resistance region of the second protection element, and Vr3 represents a negative resistance starting voltage in the negative resistance region of the third protection element.
According to a sixth aspect of the present invention, a semiconductor device comprises: a signal terminal; a high potential side power supply terminal; a low potential side power supply terminal; a first wiring connected to the high potential side power supply terminal; a second wiring connected to the low potential side power supply terminal; an internal circuit to which power is supplied from the first and the second wirings; a first protection element having a first terminal connected to the first wiring and a second terminal connected to a first node, voltage-current characteristics of the first protection element when the second terminal is grounded having a negative resistance region and a holding region, and the first node being at a wiring connecting the signal terminal with the internal circuit; a second protection element having a third terminal connected to the first node and a fourth terminal connected to the second wiring, voltage-current characteristics of the second protection element when the fourth terminal is grounded having a negative resistance region and a holding region; a third protection element having a fifth terminal connected to the first wiring and a sixth terminal connected to the second wiring, the third protection element being made up of a MOS transistor, and voltage-current characteristics of the third protection element when the sixth terminal is grounded having a negative resistance region and a holding region; a fourth protection element made up of a diode whose anode is connected to a second node and whose cathode is connected to the first wiring, the second node being at the wiring connecting the signal terminal with the internal circuit closer to the signal terminal than the first node; a fifth protection element made up of a diode whose cathode is connected to the second node and whose anode is connected to the second wiring; and a resistance element connected to the first node and the second node therebetween. The relations of xe2x80x9cVh1(I2)+r3xc3x97I2xe2x89xa7Vf5+Vr3 greater than Vr1xe2x80x9d and xe2x80x9cId1 greater than I2xe2x80x9d are satisfied, where I2 represents a value of a second current flowing from the high potential side power supply terminal to the signal terminal via the first wiring, the first protection element and the resistance element, Id1 represents a value of the second current when it causes destruction of the first protection element, r3 represents a resistance value of the resistance element, Vf5 represents a voltage when a current starts to flow through the fifth protection element in case that a positive voltage is applied to the anode of the fifth protection element while grounding a cathode of the fifth protection element, Vh1(I2) represents a voltage drop of the first protection element caused by the second current I2, Vr1 represents a negative resistance starting voltage in the negative resistance region of the first protection element, and Vr3 represents a negative resistance starting voltage in the negative resistance region of the third protection element.
According to the present invention, it is possible to ensure necessary ESD resist quantity while suppressing increase of input capacity with size of ESD protection device that is provided just near the signal terminal minimized. Further, the semiconductor device is capable of returning to normal operation without breaking power supply after stresses such as surge by the ESD and the like are removed.